# Google Splits Its Eighth-Generation TPU Into Four Systems, Adding a Confidential-Computing Chip and a Dual-Die Long-Context Part

Times of AI Desk · 2026-11-09 · Infrastructure

[https://timesof.ai/2026/11/google-tpu-8tx-8i-max-confidential-long-context](https://timesof.ai/2026/11/google-tpu-8tx-8i-max-confidential-long-context)

> Google announced TPU 8tx and TPU 8i Max on November 9, making four eighth-generation TPU systems in one year. TPU 8tx, built on TPU 8t silicon with AMD EPYC hosts, is aimed at confidential inference for regulated customers; TPU 8i Max puts two 8i chips on one package, which Google says doubles compute, SRAM and HBM bandwidth. Google says TPUs now have nearly 100 customers but gave no prices, availability dates or independent benchmark results.

Google is no longer shipping one TPU per generation; it is cutting the same generation into products for different buyers. On **November 9** it added **TPU 8tx** and **TPU 8i Max** to the TPU 8t and TPU 8i systems it introduced in April, which Google says is the first time it has introduced four TPU systems in a single year. The two new parts are aimed at problems customers are paying for now: keeping sensitive data protected while a model runs, and serving very long contexts.

## What Google announced

**TPU 8tx** is built on the same silicon as TPU 8t and paired with 5th Generation **AMD EPYC** CPU hosts. Google says it builds security into the hardware layer so data and model weights stay protected and isolated "even while in active use", and that it targets regulated enterprises and governments running frontier or proprietary models. Google says it delivers up to **2x lower latency than TPU 8t** with "a near-zero performance penalty", and can also handle small-scale training such as private fine-tuning and distillation.

**TPU 8i Max** combines two low-latency TPU 8i chips on a single package. Google says that gives double the compute, double the SRAM and double the HBM bandwidth of TPU 8i, and fits twice the silicon in the existing rack footprint.

Google paired the hardware with software: it says Cloud Pathways and GKE dynamic slicing are now generally available on Google Kubernetes Engine, that it is open-sourcing **TPU Sync**, a model-state layer that tiers KV caches off the chip, and that an open-source TPU agent suite for coding tools is in preview. It says TPUs now have **nearly 100 customers**, and that some customers deploy TPUs in their own data centres.

## Claims and checks

The performance figures are Google's. The company says its vLLM-TorchTPU stack achieved "state-of-the-art price-performance marks" on the InferenceX and AgentX benchmarks, but the post gives no numbers, comparison hardware or settings, so there is nothing yet to check against Nvidia or AMD parts. The Verge's write-up repeats the positioning, confidential computing for government agencies and regulated businesses and the 8i Max for large context windows, without independent testing.

The customer count is the more useful signal. Google is selling TPUs outside its own cloud, and buyers are already lining up: OpenAI was reported last month to be [planning to buy Google's chips](https://timesof.ai/2026/10/openai-plans-to-buy-google-tpus-compiler-hire), which neither company confirmed.

## Limits

- Google did not give prices, availability dates or regions for either system in the announcement.
- The latency, compute, SRAM and bandwidth claims are Google's own and come without independent benchmarks.
- "Nearly 100 customers" is Google's figure; it did not name them in the post.

## Sources

- [Google: Our newest TPUs: 8tx and 8i Max, built for the agentic era (November 9, 2026)](https://blog.google/innovation-and-ai/infrastructure-and-cloud/global-network/tpu-8i-max-and-8tx/)
- [The Verge: Google announced two new versions of its eighth-gen AI chips (November 9, 2026)](https://www.theverge.com/ai-artificial-intelligence/1029670/google-announced-two-new-versions-of-its-eighth-gen-ai-chips)